Controller Synthesis for Performance

Supervisory controller synthesis is a technique to automatically generate a supervisory controller in the form of a finite state automaton that define which control events could / should be activated for a plant so as to stay within a specified class of ‘correct’ system behaviors. ‘Correct’ is usually defined in terms of freedom from blocking or deadlock, avoidance of undesirable states, or reachability of desirable states.

Alternatively one may synthesize controllers so as to optimize the performance of a system, assuming that the system model includes the relevant information, in particular about the timing of the operations and the progress being made. Both criteria can be combined, i.e., stay within the boundaries of correct behavior and simultaneously optimize the performance.

A challenge that is typically faced by state-based analysis and synthesis methods, including supervisory controller synthesis, is state-space explosion, i.e., the phenomenon that the set of reachable system states can be extremely large and typically grows exponentially with the size of a system or the level of detail with which it is described.

We have explored the possibility of addressing both issues, optimizing performance, and the challenge of state-space explosion by replacing the usual finite state automata model with max-plus automata, using the activity model, which groep determinate collections of actions into single, atomic transitions, and which capture the time passing during those activities [1, 2]. A performance optimal controller can then be captured by an optimal strategy in a two-player game to maximize average progress per unit of time passed, which is called a ratio game [3].

[1] B. van der Sanden, “Performance analysis and optimization of supervisory controllers,” PhD Thesis, 2018.
[Bibtex]
@PhdThesis{San18,
author = {Bram van der Sanden},
title = {performance analysis and optimization of supervisory controllers},
school = {Eindhoven University of Technology},
year = {2018},
}
[2] [doi] B. van der Sanden, M. Geilen, M. Reniers, and T. Basten, “Partial-order reduction for supervisory controller synthesis,” Ieee transactions on automatic control, vol. 67, iss. 2, pp. 870-885, 2022.
[Bibtex]
@ARTICLE{SGRB21,
author={van der Sanden, Bram and Geilen, Marc and Reniers, Michel and Basten, Twan},
journal={IEEE Transactions on Automatic Control},
title={Partial-Order Reduction for Supervisory Controller Synthesis},
year={2022},
volume={67},
number={2},
pages={870-885},
doi={10.1109/TAC.2021.3129161}
}
[3] [doi] R. Bloem, K. Greimel, T. A. Henzinger, and B. Jobstmann, “Synthesizing robust systems,” in 2009 formal methods in computer-aided design, 2009, pp. 85-92.
[Bibtex]
@INPROCEEDINGS{BGHJ19,
author={Bloem, Roderick and Greimel, Karin and Henzinger, Thomas A. and Jobstmann, Barbara},
booktitle={2009 Formal Methods in Computer-Aided Design},
title={Synthesizing robust systems},
year={2009},
volume={},
number={},
pages={85-92},
doi={10.1109/FMCAD.2009.5351139}
}